Senior Principal Design Verification Engineer
Company: Acceler8 Talent
Posted on: August 1, 2022
Acceler8 Talent is seeking a Senior Principal Design
Verification Engineer to join an well-funded AI acceleration
start-up which is poised to deliver the industry's most disruptive
in-memory compute technology for AI at the edge.
This DV Engineer will be responsible for leading the verification
activities and architecting verification infrastructure for their
analog/mixed signal in-memory AI processor.
- Transform product vision and behavioral specifications into
efficient block-level and top-level tests
- Incorporate state of the art verification techniques to tackle
scaling and performance requirements
- Define and implement infrastructure for HW/SW
- Execute verification strategy which ensure prototypes meet
device and system level requirements
- 10+ years industry experience in design verification
- Expertise verifying chip and block-level designs for large,
- Strong experience with full chip verification and
- Ability to take ownership of blocks
- Expertise in SystemVerilog and experience with Python, Perl or
another scripting language.
- Excellent knowledge of UVM\
- Experience verifying RISC-V or ARM cores or AI acceleration
They are looking for someone to start ASAP and are offering
$200k-$250k base with a very generous equity package. Please apply
here or contact Luke at email@example.com to hear
Keywords: Acceler8 Talent, Fremont , Senior Principal Design Verification Engineer, Engineering , Fremont, California
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